1. Field of the Invention
The present invention relates to semiconductor devices. In particular, the present invention relates to serially-connected dual-gate devices used in non-volatile memory strings.
2. Discussion of the Related Art
A NAND-type memory string consists of a number of serially connected storage transistors. During programming of a NAND-type memory string, the source terminal of the storage transistor to be programmed is connected to a predetermined low voltage at one end of the memory string through inversion channels of all the intermediate storage transistors situated in between that end of the memory string and the storage transistor to be programmed. To provide that connection, the inversion channel of each of the intermediate storage transistors is made conducting by applying a “program pass voltage” at the gate electrode of the intermediate storage transistor. A programming voltage is then applied to the storage transistor to be programmed. Typically, the programming voltage is much higher than the program pass voltage.
A common problem with such a NAND-type flash memory string is “program disturb,” which occurs during programming of a memory cell in a NAND-type memory string. By applying a program pass voltage at the gate electrode, electrons in the inversion layer associated with an intermediate storage transistor may inadvertently be introduced into the charge storage gate dielectric layer of the intermediate storage transistor, thereby disturbing the programmed state of the intermediate storage transistor.